Dongxu Lyu (吕东旭)

Dongxu Lyu (吕东旭)

Shanghai Jiao Tong University

I’m a Ph.D candidate for Electrical Science and Technology at the Department of Micro/Nano Electronics (微纳电子学系), Shanghai Jiao Tong University, Shanghai, China, and under the supervision of Professor Guanghui He.

My current research interests focus on Efficient ASIC Architecture Design for Emerging Applications ().

  • Efficient Hardware Accelerators for AI Computing
    • Multi-sensor Perception Acceleration for Autonomous Driving Systems
      • Preprocessing: feature learning network (DAC’23, TVLSI’24)
      • Backbone: 3D sparse convolution (ICCAD’23)
      • Multi-modality Fusion: BEV perception (DAC’24 and new one submitted to TCAS-I)
      • Postprocessing: Non-maximum Suppression (ISCAS’23)
    • Data Compression Techniques for High-bandwidth Requirement from Future Neural Networks (TCAS-II’24)
    • Hardware/Software Co-Design for Vision/Language Transformer Model (TCAS-I’24)
  • Emerging Stochastic Computing Techniques for AI Computing
    • Efficient Sequence Generator and MAC Implementation (NANOARCH’22, TNANO’24)
  • Efficient Massive MIMO Detectors for 5G/6G Communication
    • 8x8 High-thoughput Soft-output MIMO detector (TVLSI’21)

🔥 News

  • 2024.07:  🎉🎉 One co-authored paper about ViT quantization and accelerator is accepted by IEEE TCAS-I. Congratulations to Gang Wang !!!
  • 2024.03:  🎉🎉 The preprint version of our DAC’24 paper DEFA: Deformable Attention Accelerator is available on ArXiv. Welcome to discuss with us !!
  • 2024.02:  🎉🎉 Our TNANO’24 paper can be early accessed on the IEEE Xplorer.
  • 2024.02:  🎉🎉 One co-authored paper about Deformable Attention Acceleration is accepted by DAC’24 !!! Congratulations to Yansong !!! See you in San Francisco !!!
  • 2024.02:  🎉🎉 Our TCAS-II’24 paper can be early accessed on the IEEE Xplorer.
  • 2024.02:  🎉🎉 One co-authored paper about NN data compression engine is accepted by IEEE TCAS-II. Congratulations to Yuzhou !!!
  • 2024.01:  🎉🎉 Our TVLSI’24 paper can be early accessed on the IEEE Xplorer.
  • 2024.01:  🎉🎉 The extended paper of our DAC’23 is accepted by IEEE TVLSI !!!.
  • 2023.11:  🎉🎉 One co-authored paper about SC-based MAC Design is accepted by IEEE TNANO. Congratulations to Aokun !!!
  • 2023.07:  🎉🎉 One paper about 3D Sparse Convolution Accelerator is accepted by ICCAD 2023. See you in San Francisco, US!
  • 2023.02:  🎉🎉 One paper about Feature Learning Network Acceleration of Point Clouds is accepted by DAC 2023. See you in San Francisco, US!

📝 Publications

$^{\star}$: me as the project manager; $^{\dagger}$: equal contribution.

Selected Publications

TVLSI 2024
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FLNA: Flexibly Accelerating Feature Learning Networks for Large-Scale Point Clouds with Efficient Dataflow Decoupling

Dongxu Lyu$^{\dagger}$, Zhenyu Li$^{\dagger}$, Yuzhou Chen, Gang Wang, Weifeng He, Ningyi Xu and Guanghui He

  • The first grid-based feature learning network accelerator with algorithm-architecture co-optimization for large-scale point clouds.
  • It demonstrates substantial performance boost over the state-of-the-art point cloud accelerators while providing superior support of large-scale point clouds ($>10^6$ points in $\sim$2ms).
  • An extension of our DAC’24 paper.
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DAC 2023
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FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling

Dongxu Lyu, Zhenyu Li, Yuzhou Chen, Ningyi Xu and Guanghui He

  • The first grid-based feature learning network accelerator with algorithm-architecture co-optimization.
  • It achieves 13.4−43.3× speedup over RTX 2080Ti GPU on representative FLN benchmarks.
  • 2023 60th ACM/IEEE Design Automation Conference (DAC)
ICCAD 2023
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SpOctA: A 3D Sparse Convolution Accelerator with Octree-Encoding-Based Map Search and Inherent Sparsity-Aware Processing

Dongxu Lyu, Zhenyu Li, Yuzhou Chen, Jinming Zhang, Ningyi Xu and Guanghui He

  • A novel 3D sparse convolution accelerator that enables high-speed and energy-efficient point cloud processing.
  • SpOctA rivals the state-of-the-art SpConv accelerators by 1.1-6.9x speedup with 1.5-3.1x energy efficiency improvement on their benchmarks.
  • 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)

Full Pub List

Efficient Hardware Accelerators for AI Computing (Jan. 2022 – Present)

Emerging Stochastic Computing Techniques for AI Computing (Sep. 2021 – Present)

Efficient Massive MIMO Detectors for 5G/6G Communication (Sep. 2019 – Sep. 2021)

🎖 Honors and Awards

  • 2021.11 1st Prize on China Postgraduate IC Innovation Competition (中国研究生创芯大赛) from Association of Chinese Graduate Education.
  • 2020.06 Shanghai Outstanding Graduate from Shanghai City.
  • 2020.06 Departmental Excellent Undergraduate Thesis (Department of Micro/Nano Electronics) from Shanghai Jiao Tong University.
  • 2019.09 Guanghua Scholarship from Shanghai Jiao Tong University.

📖 Educations

  • 2020.09 - 2025.06 (expected), Ph.D. student in Electronic Science and Technology (Department of Micro/Nano Electronics), Shanghai Jiao Tong University, Shanghai, China.
  • 2016.09 - 2020.06, B.E. in Microelectronics Science and Engineering (Department of Micro/Nano Electronics), Shanghai Jiao Tong University, Shanghai, China.

💬 Invited Talks

  • 2023.07, “FLNA: An Energy-Efficient Point Cloud Feature Learning Accelerator with Dataflow Decoupling” in DAC’23, Moscone Center West, San Francisco, CA, USA.
  • 2023.07, “SpOctA: A 3D Sparse Convolution Accelerator with Octree-Encoding-Based Map Search and Inherent Sparsity-Aware Processing” in ICCAD’23, Hyatt Soma Downtown, San Francisco, CA, USA.

💻 Internships